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Installation and Operation Manual Chapter 1 Introduction

ASM-40CD Ver. 1.0 Functional Description 1-5

1.3 Functional Description

Block Diagram

Figure 1-5

illustrates the circuits required for setting the correct configuration of

the modem.

NRZ

Interface

Transmit Clock

CPU

LEDs

Receive Clock

External Clock

FIFOs

BERT

V.54 Circuit

HDB3

AMI

B8ZS

Encoder/Decoder

Line Driver

AGC, Equalizer

Clock Recovery

PLL

VCXO

TC & RC

EXT CLK

POWER

Figure 1-5. ASM-40CD Block Diagram

CPU

The CPU runs the communication with the hub common logic module (CM-2),

using an internal protocol via lines LRS-TX and LRS-RX on the LRS-24 backplane. It

also drives the LEDs for indicating status and failure conditions.

Power Supply

The power supply filters the ±5V outputs from the LRS-24 power supply.

Timing Generator

ASM-40CD utilizes a PLL, VCXO circuit.

ASM-40CD transmits data to the line at one of four selectable baud rates. This

feature enables ASM-40CD to be used as a rate converter:

• 2048 kbps – transmits data at rates of 32, 64, 128, 256, 512, 1024 and

2048 kbps

• 1536 kbps – transmits data at rates of 192, 384, 768 and 1536 kbps

• 1544 kbps – transmits data rates at 1544 kbps

• 1920 kbps – transmits data at rates of 1920 kbps.

Transmit and receive timing may originate from the following sources:

• Internally

• Externally, from the data terminal

• Externally, from the receive signal (see

Figure 1-6)

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